CURRICULUM VITAE
Prof. Mohammad Yavari Ph.D. in Microelectronics Phone: +98-21-6454 3326 E-mail:
[email protected] URL: www.aut.ac.ir/myavari
University Positions ♦
Assistant Professor since September 2006, Department of Electrical Engineering, Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran.
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Founder & Director of Integrated Circuits Design Laboratory (IC Design Lab), Department of Electrical Engineering, Amirkabir University of Technology, May 2007-Present.
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Director of Informatics and Computer Center, Department of Electrical Engineering, Amirkabir University of Technology, May 2008-May 2009.
Education ♦
Ph.D. (Electrical Engineering-Electronics) University of Tehran, Tehran, Iran, Sept. 2001-June 2006 Advisors: Professor Omid Shoaei & Professor Angel Rodriguez-Vazquez Thesis Title: Low-Voltage High-Performance Sigma-Delta Modulators for Broadband Applications
June 2000-Sept. 2006, IC Design Laboratory, ECE Dept., Faculty of Engineering, University of Tehran. April 2005-Jan. 2006, Institute of Microelectronics of Seville, Centro Nacional de Microelectrónica (IMSE-CNM), Universidad de Sevilla, 41012 Seville, Spain. Ph.D. Student Research Award of the University of Tehran in 2004.
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M.Sc. (Electrical Engineering-Electronics) University of Tehran, Tehran, Iran, 1999-2001 Thesis Title: The Design of High Resolution Sigma-Delta Analog-to-Digital Converters for Digital Audio Advisor: Professor Omid Shoaei
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B.Sc. (Electrical Engineering-Electronics) University of Tehran, Tehran, Iran, 1995-1999 Project: Design & Fabrication of a Discrete Transceiver with FM Modulation in Amateur Bandwidth Advisor: Professor Mahmoud Kamarei
Research Visiting Professor •
December 2010-Feb. 2011, Institute of Microelectronics of Seville, Centro Nacional de Microelectrónica (IMSE-CNM), Universidad de Sevilla, 41012 Seville, Spain.
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August 2009-Oct. 2009, Institute of Microelectronics of Seville, Centro Nacional de Microelectrónica (IMSE-CNM), Universidad de Sevilla, 41012 Seville, Spain
Current Research Interests ♦
Analog and mixed-signal integrated circuits and signal processing
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CMOS analog-to-digital and digital-to-analog converters
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Adaptive and background calibration techniques for analog and mixed-signal systems
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Low-voltage and low-power switched-capacitor circuit techniques
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CMOS RFIC design for wireless communications
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Integrated circuits for implantable biomedical applications
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CMOS readout circuits for capacitive sensors
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 1 of 12
Teaching Experience Advanced Analog Integrated Circuit Design (Graduate Course) ¾ Amirkabir University of Technology, Fall 2006, Fall 2007, Fall 2008, Fall 2009, Fall 2010, Fall 2011, Fall 2012, Fall 2013. ¾ K.N. Toosi University of Technology, Fall 2006. ¾ Azad University, Qazvin Branch, Spring 2009, Fall 2009. Data Converters (Graduate Course) ¾ Amirkabir University of Technology, Spring 2007, Spring 2008, Spring 2009, Spring 2010, Spring 2011, Spring 2012, Spring 2013, Spring 2014. ¾ Azad University, Qazvin Branch, Spring 2008. CMOS RFIC Design (Graduate Course) ¾ Amirkabir University of Technology, Fall 2007, Fall 2008, Fall 2009, Fall 2010, Fall 2012, Fall 2013. ¾ Rejaei University, Spring 2008. ¾ Azad University, Tehran South Branch, Fall 2008. ¾ Azad University, Qazvin Branch, Fall 2007, Fall 2008. Advanced VLSI (Graduate Course) ¾ Amirkabir University of Technology, Spring 2011. CMOS Analog Integrated Circuit and System Design (An Optional Advanced B.Sc. Course) ¾ Amirkabir University of Technology, Spring 2007. Electronics III (B.Sc. Course) ¾ Amirkabir University of Technology, Spring 2008, Spring 2009, Spring 2010, Spring 2011, Spring 2012, Spring 2013, Spring 2014. ¾ Azad University, Qazvin Branch, Fall 2007, Spring 2008, Fall 2008, Spring 2009, Fall 2009. Electronics II (B.Sc. Course) ¾ Amirkabir University of Technology, Spring 2010, Spring 2014. ¾ University of Tehran, Fall 2003, Spring 2004, Fall 2004. ¾ Azad University, Qazvin Branch, Spring 2008, Fall 2008, Spring 2009, Fall 2009. Electronics I (B.Sc. Course) ¾ Amirkabir University of Technology, Fall 2011. ¾ Azad University, Qazvin Branch, Fall 2007. Lectures on Data Converters: Sigma-Delta Modulators (M.Sc. Course) ¾ University of Tehran, May 2002, Jan.-Feb. 2003, May 2004, Feb. 2005, April 2006 Teaching Assistant ¾ Data Converters, University of Tehran, M.Sc. Course, Jan. 2002-Sept. 2002, Jan. 2003-Sept. 2003 ¾ CMOS Analog Circuit Design, University of Tehran, M.Sc. Course, Sept. 2002-Jan. 2003 ¾ Electronics III, University of Tehran, B.Sc. Course, Jan. 2001-June 2001 ¾ Electrical Circuits, University of Tehran, B.Sc. Course, Aug. 1999-Jan. 2000 ¾ Electromagnetics, University of Tehran, B.Sc. Course, Jan. 1998-Jan. 2000
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 2 of 12
Thesis Supervised Ph.D. Thesis in Progress • Hossein Pakniat, Architectural Improvement of Continuous-Time Sigma-Delta Modulators for Broadband Applications, Approved in Nov. 2011. •
Tohid Moosazadeh: High-Performance Opamp-Less Pipelined Analog-to-Digital Converters, Approved in April 2012.
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Mohsen Tamaddon: Analysis and Design of Continuous-Time Sigma-Delta Modulators with Time-Domain Quantization for Broadband Applications, Approved in Sept. 2013.
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Mahdi Barati, to be defined.
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Saeid Barati, to be defined.
Graduated Masters Thesis 1.
Elham Rahimi, Ultra Low-Power Baseband CMOS Interface Circuits for Wireless Acquisition of Human EEG Signals, Jan. 2014.
2.
Beheshteh Khazaeili, System Level and Circuit Level Improvement of Discrete-Time SigmaDelta Modulators for High-Speed Applications, Jan. 2014.
3.
Sajad Golabi, Analysis, Design, and Structural Improvement of CMOS Operational Amplifiers for Switched-Capacitor Circuits, Sept. 2013.
4.
Babak Mazhabjafari, Noise Figure and Linearity Improvement of Low Noise Amplifiers (LNAs) for Ultra-Wideband Applications in Nano-meter CMOS Technologies, Sept. 2013.
5.
Meysam Asghari, Linearization and Noise Reduction of Active Mixers in Ultra-Wideband Zero-IF Receivers, Sept. 2013.
6.
Najmeh Hajamini, Design and Simulation of a Wide Tuning Range Voltage Controlled Oscillator for Cognitive Radios, Feb. 2013.
7.
Mohsen Shahghasemi, Architectural Improvement of Discrete-Time Sigma-Delta Modulators for Broadband Applications, Feb. 2013.
8.
Reza Inanlou, Design and Simulation of a Very Low-Power Successive Approximation Register (SAR) Analog to Digital Converter for Biomedical Applications, Feb. 2013.
9.
Ali Shafti, Opamp-Less Low Power Pipeline Analog-to-Digital Converters, Feb. 2013.
10.
Mohammad Khoshakhlagh, Design and Simulation of Low-Power Successive Approximation Register (SAR) Analog-to-Digital Converters, July 2012.
11.
Amir Hossein Ansari, Design and Simulation of Wideband LNAs for Cognitive Radios, Feb. 2012.
12.
Behzad Zeinali, Digital Background Correction of Circuits Nonlinearity in Pipelined A/D Converters, Feb. 2012.
13.
Najmeh Ebrahimi, Design and Simulation of CMOS Interface Circuits for MEMS Capacitive Accelerometers with µg Resolution, Feb. 2012.
14.
Mortaza Mojarad, Design and Simulation of Low-Power Low-Dropout (LDO) Voltage Regulators for On-Chip Applications, Feb. 2012.
15.
Mohammad Habib Parsafar, Design and Simulation of A Tunable Channel Select Filter for Multistandard RF Receiver in 90nm CMOS, July 2011.
16.
Mohammad Sadegh Mehrjoo, Design and Simulation of High-Linearity Wideband LNAs in NanoMeter CMOS Technologies, July 2011.
17.
Fatemeh Ataei, Design and Simulation of A Wide Tuning Range VCO in 90 nm CMOS, Feb. 2011.
18.
Mahdi Barati, Linearization of CMOS Active Mixers in Zero-IF Receivers, Feb. 2011.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 3 of 12
19.
Zahra Sohrabi, Design and Simulation of Sigma-Delta Modulators for broadband applications in 90nm- CMOS, Feb. 2011.
20.
Mohammad Reza Ashraf, Design and Simulation of A Low-Power Pipelined A/D Converter in 90nm CMOS, Sept. 2010.
21.
Mojtaba Allah-Bakhshian, Design and Simulation of A Time-Interleaved Pipeline A/D Converter in 90 nm CMOS, Sept. 2010.
22.
Tohid Moosazadeh, Design and Simulation of A Low-Power High-Resolution Pipeline A/D Converter in 90 nm CMOS, July 2010.
23.
B. Hoda Seyedhosseinzadeh, Design and Simulation of A Sigma-Delta Modulator for MultiStandard Wireless Receivers in 90 nm CMOS, July 2010.
24.
Hossein Pakniat, DAC Linearization in Sigma-Delta A/D Converters with Low Oversampling Ratios, Jan. 2010.
25.
Mohammad Hossein Maghami, Design and Simulation of Hybrid CT/DT Sigma-Delta Modulators for Broadband Applications in 90nm CMOS, June 2009.
26.
Mahdi Mirzaei, Design and Simulation of Continuous-Time Sigma-Delta Modulators for HighSpeed Applications in 90nm CMOS, Sept. 2009.
27.
Sahel Abdinia, Design and Simulation of A Low-Power and High-Speed Pipelined Analog-toDigital Converter in 90nm CMOS, June 2009.
28.
Monireh Moayedi Poorfard, Design and Simulation of Sigma-Delta Modulators for High-Speed Applications in 90nm CMOS, June 2009.
29.
Ali Mirvakili, Design of an Ultra-Wideband Low-Noise Amplifier in 130-nm CMOS, Sept. 2008.
30.
Majid Jalalifar, Design of Multistage Amplifiers in Low-Voltage and Sub-micron CMOS Technologies, Sept. 2008.
Masters Thesis in Progress 1. Fatemeh Zareh, Low-Power High-Speed Time-Interleaved SAR A/D Converters. 2.
Masoud Eshaghinia, Sigma-Delta Modulator with Time-Domain Quantization.
3.
Abbas Esmaeili, Low Phase Noise CMOS Voltage Controlled Oscillators.
4.
Mehdi Moradian, LDO Voltage Regulators for Implantable Biomedical Applications.
5.
Farzaneh Jalali, Highly Linear CMOS Low-Noise Amplifiers with Harmonic Rejection.
6.
Pouya Solati, Linearity Enhancement of CMOS Active Mixers for Cognitive Radios.
7.
Mitra Saeedi, Architectural Improvement of Pipelined Analog-to-Digital Converters.
8.
Zeinab Hojati, Low-Power Incremental Sigma-Delta A/D Converters for Biomedical Applications.
9.
Zohreh Hajipourzadeh, Sigma-Delta A/D Converters with VCO Quantization.
10.
Mohammadali Montazerghaem, Digital Background Calibration in Pipelined A/D Converters.
11.
Alireza Bafandeh, Digital Calibration of Analog Circuits Non-Idealities in Sigma-Delta A/D Converters.
12.
Mahdi Asadollahzadehmanesh, Power Reduction Techniques in Low-Voltage SwitchedCapacitor Circuits.
13.
Nasrin Baniasadi, Ultra Low-Power Curvature-Compensated Bandgap Voltage References in Nano-meter CMOS Technologies.
Graduated B.Sc. Projects 1.
Sajad Malekizadeh: SAR ADC Design, 2010.
2.
Fatemeh Talebi: Layout of Analog and Mixed-Signal Circuits, 2010.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 4 of 12
3.
Mohammad Javad Dezyani: Design of Cascode Compensated Two-Stage Amplifiers, 2010.
4.
Bahareh Ebrahimi: Low-Voltage Bandgap Voltage References, 2010.
5.
Zahra Baghali: Multi-Band CMOS Low-Noise Amplifiers, 2009.
6.
Behzad Zeinali: CMOS Tunable Low-Pass Filters, 2009.
7.
Mohammad Reza Mohammadi: Design of Decimation Filters for Sigma-Delta A/D Converters, 2009.
8.
Mohammad Mehdi Taghipour: Linearization of CMOS Active Mixers for Zero-IF Receivers, 2009.
9.
Ehsan Hashemi: Linearization of CMOS Active Mixers for Zero-IF Receivers, 2009.
10.
Mohsen Tamaddon: Ultra Wideband CMOS Low-Noise Amplifiers, 2008.
11.
Maryam Hasani: Design of an LNA for WiMAX Receivers, 2008.
12.
Hossein Shokri: Design of Three-Stage CMOS Operational Amplifiers, 2008.
13.
Mona Mirzaei: A VCO Design for WiMAX Receivers, 2008.
14.
Mahsa Keshavarz: Design of an IQ Mixer for Zero-IF WiMAX Receivers, 2008.
Industrial Experience & Research Projects •
May 2004-April 2005, Oct. 2006-May 2007, Niktek Inc., Tehran, Iran: Design of 24-Bit Audio ADCs and DACs and the Director of the Group
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June 2000–Jan. 2001, Ravesh-e No Co., Tehran, Iran: System-Level and Circuit Level Design of a 24-b Audio Sigma-Delta Modulator
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A CMOS Interface IC for Capacitive Sensors, Amirkabir University of Technology, April 2010-April 2012, Total Grant: 25000 $.
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Design & Fabrication of Readout Interface ICs for Capacitive Sensors, Amirkabir University of Technology, July 2012-July 2013, Total Grant: 30000 $.
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Very Low-Voltage and High-Speed Sigma-Delta Modulators, University of Tehran, April 2002-Jan. 2003, Total Grant: 2500 $.
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Sigma-Delta Analog to Digital Data Converters, University of Tehran, June 2001-March 2002, Total Grant: 2000 $.
Implemented ICs •
A Low-Power 24-bit 48/96/192kHz Output Sampling Rate Analog-to-Digital Converter for Digital Audio Using Chopper Stabilization (a commercial chip, successfully tested)
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A Low-Power 24-bit 48/96/192kHz Input Sampling Rate Digital-to-Analog Converter for Digital Audio (a commercial chip, successfully tested)
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A 1.2-V, 15-bit, 12.5-MHz Nyquist-Rate, 50-mW Sigma-Delta Modulator in 0.13-µm CMOS (verified functionally and now under final tests)
Examiner in National Exams •
National Universities Entrance Exam for Masters Degree in Electrical Engineering & Electromechanical Engineering since 2004.
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National Universities Entrance Exam for Ph.D. Degree in Electrical Engineering (Electronics) since 2012.
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National Olympiad of Electrical Engineering since 2004.
Reviewer •
IEEE Transactions on Circuits and Systems-I: Regular Papers
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 5 of 12
• • • • • • • • • • • • • • •
IEEE Transactions on Circuits and Systems-II: Express Briefs International Journal of Circuit Theory and Applications IET Proceedings on Circuits, Devices, and Systems IET Electronics Letters Microelectronics Journal (Elsevier) Journal of Circuits, Systems, and Computers (World Scientific) Journal of Amirkabir University of Technology International Journal of Engineering Journal of Iranian Association of Electrical and Electronics Engineers (IAEEE) IEEE International Symposium on Circuits and Systems (ISCAS) International Conference on Electronics, Circuits, and Systems (ICECS) IEEE NewCAS Canadian Conference on Electrical and Computer Engineering (CCECE) Reviewer and Track Chair in Iranian Conference on Electrical Engineering (ICEE) International Symposium on Telecommunications (IST)
Computer Experience Operating systems: Programming: Mathematical software: Circuit and system simulators: Layout and PCB tools: Hardware description languages:
Microsoft Windows 98/2000/2007/XP-NT, UNIX, and Linux Pascal, C MATLAB, SIMULINK, Maple, Mathematica Cadence, HSPICE, Switcap, PSPICE, Eldo Cadence-Virtuoso, Calibre, Assura, L-Edit, Magic, Protel Verilog
Publications Book M. Yavari, Solutions of Electronics I & II Tests, Electrical Engineering, National Masters Entrance Exam, since 2005 (9th edition published in 2013).
Journal Papers 2014 1.
B. Khazaeili and M. Yavari, “MASH Σ∆ modulator with highly reduced in-band quantization noise,” IET Electronics Letters, Jan. 2014.
2.
M. Asghari and M. Yavari, “Using interaction between two nonlinear systems to improve IIP3 in active mixers,” IET Electronics Letters, Jan. 2014.
2013 3.
T. Moosazadeh and M. Yavari, “A High-Performance Pseudo-Differential Pipelined ADC with A Novel ClassAB Gain Boosting Inverter,” Analog Integrated Circuits and Signal Processing, Springer, Published online at 25th Dec. 2013.
4.
R. Inanlou and M. Yavari, “A 10-Bit 0.5 V 100 kS/s SAR ADC with A New Rail-to-Rail Comparator for Energy Limited Applications,” Journal of Circuits, Systems, and Computers, Published online at 17th Dec. 2013.
5.
H. Pakniat and M. Yavari, “A Time-Domain Noise-Coupling Technique for Continuous-Time Sigma-Delta Modulators,” Analog Integrated Circuits and Signal Processing, Springer, Published online at 1st Nov. 2013.
6.
R. Inanlou, M. Shahghasemi, and M. Yavari, “A Noise-Shaping SAR ADC for Energy Limited Applications in 90 nm CMOS Technology,” Analog Integrated Circuits and Signal Processing, Springer, vol. 77, pp. 257-269, Oct. 2013.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 6 of 12
7.
H. Pakniat and M. Yavari, “A Σ∆-FIR-DAC for Multibit Σ∆ Modulators,” IEEE Trans. on Circuits and SystemsI: Regular Papers, vol. 60, no. 9, pp. 2321-2332, Sept. 2013.
8.
B. Zeinali, T. Moosazadeh, M. Yavari, and A. Rodriguez-Vazquez, “Equalization-Based Digital Background Calibration Technique for Pipelined ADCs,” IEEE Trans. on Very Large Scale Integration (VLSI) Systems, published online at 12th Feb. 12, 2013.
9.
M. Khoshakhlagh and M. Yavari, “An Efficient Threshold Voltage Generation for SAR ADCs,” Analog Integrated Circuits and Signal Processing, Springer, vol. 75, no. 1, pp. 161-169, Apr. 2013.
10. M. Mojarad and M. Yavari, “A Low Power Four-Stage Amplifier for Driving Large Capacitive Loads,” International Journal of Circuit Theory and Applications, published online at 24th Jan. 2013.
2012 11. F. Ataei and M. Yavari, “A Very Low Noise Wideband Class-C CMOS LC VCO,” Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, vol. 21, no. 4, pp. 1250033-1-1250033-10, June 2012. 12. B. H. Seyedhosseinzadeh and M. Yavari, “An Efficient Low-Power Sigma-Delta Modulator for Multi-Standard Wireless Applications,” Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, vol. 21, no. 4, pp. 1250028-1-1250028-20, June 2012. 13. Z. Sohrabi and M. Yavari, “A 13 bit 10 MHz Bandwidth MASH 3-2 Σ∆ Modulator in 90 nm CMOS,” International Journal of Circuit Theory and Applications, vol. 41, no. 11, pp. 1136-1153, Nov. 2013, first published online at 17th April 2012. 14. M. H. Maghami and M. Yavari, “A Hybrid CT/DT Double-Sampled SMASH Σ∆ Modulator for Broadband Applications in 90 nm CMOS Technology,” Analog Integrated Circuits and Signal Processing, Springer (Special Issue of ICECS 2009), vol. 73, no. 1, pp. 101-114, Oct. 2012.
2011 15. M. Barati and M. Yavari, “A Linearization Technique for Active Mixers in Zero-IF Receivers with Inherent Balun,” IEICE Electron. Express, vol. 8, no. 24, pp. 2080-2086, Dec. 2011. 16. M. Yavari, “A Design Procedure for CMOS Three-Stage NMC Amplifiers,” IEICE Trans. Fundamentals, vol. E94-A, no. 2, pp. 639-645, Feb. 2011.
2010 17. T. Moosazadeh and M. Yavari, “A Novel Digital Calibration Technique for Pipelined ADCs,” IEICE Electron. Express, vol. 7, no. 23, pp. 1741-1746, Dec. 2010. 18. M. H. Maghami and M. Yavari, “Low-Voltage Double-Sampled Hybrid CT/DT Σ∆ Modulator for Wideband Applications,” Journal of Circuits, Systems, and Computers, World Scientific, vol. 19, no. 8, pp. 1743-1751, Dec. 2010. 19. M. Yavari, “Active-Feedback Single Miller Capacitor Frequency Compensation Techniques for Three-Stage Amplifiers,” Journal of Circuits, Systems, and Computers, World Scientific, vol. 19, no. 7, pp. 1381-1398, Nov. 2010. 20. M. S. Mehrjoo and M. Yavari, “A New Input Matching Technique for Ultra Wideband LNAs,” IEICE Electron. Express, vol. 7, no.18, pp. 1376-1381, 25th Sept. 2010. 21. M. Yavari, “Single-Stage Class AB Operational Amplifier for SC Circuits,” IET Electronics Letters, vol. 46, no.14, pp. 977-979, 8th July 2010. 22. S. Abdinia and M. Yavari, “A Low-Voltage Low-Power 10-bit 200 MS/s Pipelined ADC in 90nm CMOS,” Journal of Circuits, Systems, and Computers, World Scientific Publishing Company, vol. 19, no. 2, pp. 393405, April 2010. 23. M. Jalalifar and M. Yavari, “A New Frequency Compensation Technique in Three Stage Amplifiers with Active Feedback,” Majlesi Journal of Electrical Engineering, vol. 4, no. 1, pp. 7-12, Mar. 2010.
2009 24. M. Yavari, “A New Class AB Folded-Cascode Operational Amplifier,” IEICE Electron. Express, vol. 6, no. 7, pp. 395-402, Apr. 2009.
2008 Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 7 of 12
25. A. Mirvakili, M. Yavari, and F. Raissi, “A Linear Current-Reused LNA for 3.1-10.6 GHz UWB Receivers,” IEICE Electron. Express, vol. 5, no. 21, pp. 908-914, Nov. 2008.
2006 26. M. Yavari, O. Shoaei, and A. Rodriguez-Vazquez, “Double-Sampling Single-Loop Σ∆ Modulator Topologies for Broadband Applications,” IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 53, no. 4, pp. 314-318, Apr. 2006.
2005 27. M. Yavari, “Hybrid Cascode Compensation for Two-Stage CMOS Opamps,” IEICE Transactions on Electronics, Special Section on Analog Circuit and Device Technologies, vol. E88-C, no. 6, pp. 1161-1165, Jun. 2005. 28. M. Yavari and O. Shoaei, “Efficient Double-Sampled Cascaded Σ∆ Modulator Topologies for Low OSRs,” IEICE Electron. Express, vol. 2, no. 13, pp. 404-410, Jul. 2005. 29. M. Yavari, N. Maghari, and O. Shoaei, “An Accurate Analysis of Slew-Rate for Two-Stage CMOS Opamps,” IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 52, no. 3, pp. 164-167, Mar. 2005.
2004 30. M. Yavari and O. Shoaei, “Low-Voltage Low-Power Fast-Settling CMOS Operational Transconductance Amplifiers for Switched-Capacitor Applications,” IEE Proceedings on Circuits, Devices, and Systems, vol. 151, no. 6, pp. 573-578, Dec. 2004. 31. M. Yavari and O. Shoaei, “A Novel Fully-Differential Class AB Folded-Cascode OTA,” IEICE Electron. Express, vol. 1, no. 13, pp. 358-362, Oct. 2004. 32. M. Yavari and O. Shoaei, “Design of Very Low-Voltage High-Speed Sigma-Delta Modulators,” Journal of Faculty of Engineering (in Persian), University of Tehran, Iran, no. 3, vol. 38, pp. 441-459, Aug. 2004. 33. M. Yavari, O. Shoaei, and F. Svelto, “Low-Voltage Sigma-Delta Modulator Topologies for Broadband Communications Applications,” IEICE Transactions on Electronics, Special Section on Analog Circuit and Device Technologies, Vol. E87-C, no. 6, pp. 964-975, Jun. 2004.
2002 34. M. Yavari and O. Shoaei, “Design a 3.3-V 18-bit Sigma-Delta Modulator for Digital Audio Applications,” Journal of Faculty of Engineering (in Persian), University of Tehran, Iran, no. 3, pp. 333-344, Dec. 2002.
Conference Papers 2013 1.
N. Hajamini and M. Yavari, “A Ring-Type ILFD with Locking Range of 91% for Divide-by-4 and 40% for Divide-by-8 with Quadrature Outputs,” Iranian Conference on Electrical Engineering (ICEE), Mashad, Iran, May 2013.
2.
M. Barati, B. MazhabJafari, and M. Yavari, “A New Linearization Technique for CMOS Low Noise Amplifiers with Balun Circuitry,” Iranian Conference on Electrical Engineering (ICEE), Mashad, Iran, May 2013.
2012 3.
N. Ebrahimi Seraji and M. Yavari, “On the Design and Optimization of a Switched-Capacitor Interface Circuit for MEMS Capacitive Sensors,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 286290, May 2012.
4.
M. Mojarad and M. Yavari, “A Fast Settling On-Chip Low-Dropout Regulator with a Robust Frequency Compensation Scheme,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 291-294, May 2012.
5.
M. Khoshakhlagh and M. Yavari, “A SAR ADC with an Efficient Threshold Voltage Generation,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 301-304, May 2012.
6.
M. S. Mehrjoo, A. Ansari and M. Yavari, “A Noise Reduction Technique for Wideband LNAs in Low-Power Digital TV Applications,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 305-308, May 2012.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
Page 8 of 12
2011 7.
A. Ansari and M. Yavari, “A Very Wideband Low Noise Amplifier for Cognitive Radios,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, pp. 623-626, Dec. 2011.
8.
M. Mojarad and M. Yavari, “A Novel Frequency Compensation Scheme for On-Chip Low-Dropout Voltage Regulators,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, pp. 318321, Dec. 2011.
9.
H. Pakniat and M. Yavari, “Dual Quantization Continuous Time Σ∆ Modulators with Spectrally Shaped Feedback,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, pp. 414417, Dec. 2011.
10. B. Zeinali and M. Yavari, “A New Digital Background Correction Algorithm with Non-Precision Calibration Signals for Pipelined ADCs,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Beirut, pp. 418-421, Dec. 2011. 11. F. Ataei and M. Yavari, “A 2.2 GHz High-Swing Class-C VCO with Wide Tuning Range,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, Korea, Aug. 2011. 12. N. Ebrahimi Seraji and M. Yavari, “Minimum Detectable Capacitance in Capacitive Readout Circuits,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, Korea, Aug. 2011. 13. T. Moosazadeh and M. Yavari, “A 10-Bit 100-MSample/s Pipelined Analog-to-Digital Converter Using Digital Calibration Technique,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 388-392, May 2011. 14. F. Ataei and M. Yavari, “A Wideband Dual-Mode VCO with Analog and Digital Automatic Amplitude Control Circuitry,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 54-59, May 2011. 15. M. R. Ashraf and M. Yavari, “A 10-bit 250MS/s Pipelined ADC with a Merged S/H & 1st Stage Using an Optimal Opamp Sharing Technique,” Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, pp. 325-329, May 2011. 16. M. S. Mehrjoo and M. Yavari, “A Low Power UWB Very Low Noise Amplifier Using an Improved Noise Reduction Technique,” IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, pp. 277-280, May 2011. 17. M. Barati and M. Yavari, “A Highly Linear Mixer with Inherent Balun Using A New Technique to Remove Common Mode Currents,” IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, pp. 1884-1887, May 2011.
2010 18. T. Moosazadeh and M. Yavari, “A Fully Digital Calibration Technique for Nonlinearity Correction in Pipelined ADCs,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Athens, Greece, pp. 126-129, Dec. 2010. 19. M. R. Ashraf and M. Yavari, “A High Speed 1.5-Bit Mismatch-Insensitive Multiplying Digital-to-Analog Converter,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Athens, Greece, pp. 776-779, Dec. 2010. 20. B. H. Seyedhosseinzadeh and M. Yavari, “A Reconfigurable Sigma-Delta Modulator for Multi-Standard Wireless Applications,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Athens, Greece, pp. 1135-1138, Dec. 2010. 21. M. S. Mehrjoo and M. Yavari, “A Low-Power Noise Reduction Technique for Broadband CMOS Low-Noise Amplifiers,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Athens, Greece, pp. 174-177, Dec. 2010. 22. B. H. Seyedhosseinzadeh and M. Yavari, “A MATLAB Toolbox Synthesizing Reconfigurable Delta-Sigma Modulators for Multi-Standard Wireless Applications,” 5th European Conference on Circuits and Systems for Communications (ECCSC), Belgrade, Serbia, pp. 204-207, Nov. 2010. 23. M. H. Maghami and M. Yavari, “Hybrid CT/DT Resonation-Based Cascade Σ∆ Modulators for Broadband Low-Voltage Applications,” 5th European Conference on Circuits and Systems for Communications (ECCSC), Belgrade, Serbia, pp. 107-110, Nov. 2010.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
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24. T. Moosazadeh and M. Yavari, “A Novel Digital Background Calibration Technique for Pipelined ADCs,” 5th European Conference on Circuits and Systems for Communications (ECCSC), Belgrade, Serbia, pp. 127130, Nov. 2010. 25. H. Pakniat, M. Yavari, and R. Lotfi, “A Digital Background Correction Technique Combined with DWA for DAC Mismatch Errors in Multibit Σ∆ ADCs,” IEEE International Symposium on Circuits and Systems (ISCAS), Paris, pp. 293-296, May 2010. 26. T. Moosazadeh and M. Yavari, “A Simple Digital Background Gain Error Calibration Technique for Pipelined ADCs,” Iranian Conference on Electrical Engineering (ICEE), Esfahan, Iran, pp. 437-441, May 2010. 27. H. Pakniat and M. Yavari, “A Digital Calibration Technique Combined with DWA for Multibit Σ∆ ADCs,” Iranian Conference on Electrical Engineering (ICEE), Esfahan, Iran, May 2010.
2009 28. S. Abdinia and M. Yavari, “A New Architecture for Low-Power High Speed Pipelined ADCs Using DoubleSampling and Opamp-Sharing Techniques,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Hemmamet, Tunisia, pp. 395-398, Dec. 2009. 29. M. Maghami and M. Yavari, “A Double-Sampled Hybrid CT/DT SMASH Σ∆ Modulator for Wideband Applications,” IEEE International Conference on Electronics, Circuits and Systems (ICECS), Hemmamet, Tunisia, pp. 41-44, Dec. 2009. 30. Y. Koolivand, M. Yavari, O. Shoaei, and A. Fotowat-Ahmady, “Low Voltage Low Power Techniques in Design of Zero IF CMOS Receivers, IEEE International Conference on Electronics, Circuits and Systems (ICECS), Hemmamet, Tunisia, pp. 13-16, Dec. 2009. 31. H. Shokri and M. Yavari, “A Systematic Design Procedure for CMOS Three-Stage NMC Amplifiers,” European Conference on Circuit Theory and Design, ECCTD, Antalya, Turkey, pp. 499-502, Aug. 2009. 32. M. Yavari, “MASH Sigma-Delta Modulators with Reduced Sensitivity to the Circuit Non-Idealities,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 3126-3129, May 2009. 33. M. Maghami and M. Yavari, “Multirate Double-Sampling Hybrid CT/DT Sigma-Delta Modulators for Wideband Applications,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 2253-2256, May 2009. 34. A. Mirvakili and M. Yavari, “A Noise-Canceling CMOS LNA Design for the Upper Band of UWB DS-CDMA Receivers,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 217-220, May 2009. 35. H. Shamsi and M. Yavari, “On the Design of a Less Jitter Sensitive NTF for NRZ Multi-Bit Continuous-Time ∆Σ Modulators,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 1553-1556, May 2009. 36. M. Moayedi and M. Yavari, “High-Order Cascaded Sigma-Delta Modulators for Low-Voltage Wideband Applications,” Iranian Conference on Electrical Engineering (ICEE), pp. 400-403, Tehran, Iran, May 2009. 37. H. Shokri and M. Yavari, “Design of CMOS Three-Stage Amplifiers with Nested Miller Compensation,” Iranian Conference on Electrical Engineering (ICEE), pp. 404-407, Tehran, Iran, May 2009.
2008 38. A. Mirvakili and M. Yavari, “A Linear Wideband CMOS LNA for 3-5 GHz UWB Systems,” International SOC Design Conference (ISOCC), Korea, vol. II, pp. 150-153, Nov. 2008. 39. M. Jalalifar, M. Yavari, and F. Raissi, “A Novel Topology in Reversed Nested Miller Compensation Using Dual-Active Capacitance,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 2270-2273, May 2008. 40. M. Jalalifar, M. Yavari, and F. Raissi, “A Novel Topology in RNMC Amplifiers with Single Miller Compensation Capacitor,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 296-299, May 2008. 41. M. Jalalifar, M. Yavari, and F. Raissi, “A Novel Frequency Compensation Technique in Three Stage Amplifiers with Active Feedback,” Iranian Conference on Electrical Engineering, ICEE, pp. 367-372, Tehran, Iran, May 2008.
2007 42. M. Yavari and A. Rodriguez-Vazquez, “Accurate and Simple Modeling of Amplifier DC Gain Nonlinearity in Switched-Capacitor Circuits,” European Conference on Circuit Theory and Design, ECCTD, Sevilla, Spain, pp. 144-147, Aug. 2007. Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
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2006 43. M. Yavari, O. Shoaei, and A. Rodriguez-Vazquez, “Double-Sampled Cascaded Sigma-Delta Modulator Topologies for Low Oversampling Ratios” IEEE International Symposium on Circuits and Systems, ISCAS, pp. 597-600, May 2006. 44. M. Yavari, O. Shoaei, and A. Rodriguez-Vazquez, “Systematic and Optimal Design of CMOS Two-Stage Opamps with Hybrid Cascode Compensation,” Design Automation and Test in Europe, DATE, Munich, Germany, pp. 144-149, March 2006. 45. M. Yavari, O. Shoaei, and A. Rodriguez-Vazquez, “Double-Sampling Single-Loop Sigma-Delta Modulator Topologies for Broadband Applications,” Design Automation and Test in Europe, DATE, Munich, Germany, pp. 399-404, March 2006.
2005 46. M. Yavari and O. Shoaei, “A Novel Fully-Differential Class AB Folded-Cascode OTA for Switched- Capacitor Applications,” IEEE International Conference on Electronics, Circuits and Systems, ICECS, 2005. 47. M. Yavari and O. Shoaei, “High-Order Single-Loop Double-Sampling Sigma-Delta Modulator Topologies for Broadband Applications,” IEEE International Symposium on Circuits and Systems, ISCAS, Kobe, Japan, pp. 5593-5596, May 2005. 48. M. Yavari, O. Shoaei, and F. Svelto “Hybrid Cascode Compensation for Two-Stage CMOS Operational Amplifiers,” IEEE International Symposium on Circuits and Systems, ISCAS, Kobe, Japan, pp. 1565-1568, May 2005.
2004 49. M. Yavari and O. Shoaei, “Low-Voltage Sigma-Delta Modulator Topologies for Broadband Applications,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. I 465-468, 2004. 50. N. Maghari, M. Yavari, and O. Shoaei, “A Novel Model for the Slewing Behavior of Two-Stage CMOS OTAs,” IEEE International Symposium on Circuits and Systems, ISCAS, pp. I 553-556, 2004.
2003 51. M. Yavari and O. Shoaei, “Low-Voltage Low-Power Fast-Settling CMOS Operational Transconductance Amplifiers for Switched-Capacitor Applications,” International Symposium on Low Power Electronics and Design, ISLPED, Seoul, Korea, pp. 345-348, August 2003. 52. M. Yavari, H. Zare-Hoseini, M. Farazian, and O. Shoaei, “A New Compensation Technique for Two-Stage CMOS Operational Transconductance Amplifiers,” IEEE International Conference on Electronics, Circuits and Systems, ICECS, Sharjah, UAE, pp. 539-542, Dec. 2003. 53. H. Zare-Hoseini, M. Yavari, and O. Shoaei, “A Very Low-Noise Low-Power Integrator for a High-Resolution Delta-Sigma Modulator,” IEEE International Conference on Electronics, Circuits and Systems, ICECS, Sharjah, UAE, pp. 802-805, Dec. 2003. 54. M. Farazian, O. Shoaei, and M. Yavari, “Topology Selection for Low-Voltage Low-Power Wireless Receivers,” IEEE International Conference on Electronics, Circuits and Systems, ICECS, Sharjah, UAE, pp. 20-23, Dec. 2003. 55. M. Yavari and O. Shoaei, and A. Afzali-Kusha, “A Very Low-Voltage Low-Power and High-Resolution SigmaDelta Modulator for Digital Audio in 0.25-µm CMOS,” IEEE International Symposium on Circuits and Systems, ISCAS, vol. 2, pp. 1045-1048, Bangkok, Thailand, May 2003. 56. M. Yavari, “A 1.2-V, 1.6-mW, 107-dB Dynamic Range, and 99.5-dB SNDR Sigma-Delta Modulator for Digital Audio in 0.25-µm CMOS,” Iranian Conference on Electrical Engineering, ICEE, vol. 1, pp. 514-521, Shiraz, Iran, May 2003.
2002 57. M. Yavari and O. Shoaei, “Very Low-Voltage, Low-Power and Fast-Settling OTA for Switched-Capacitor Applications,” IEEE International Conference on Microelectronics, ICM, Beirut, Lebanon, pp. 10-13, Dec. 2002. 58. H. Shamsi, O. Shoaei, M. Yavari, and M. Y. Azizi, “A 160-MHz Six-Order Wideband Bandpass Sigma-Delta Modulator,” IEEE Asia Pacific Conference on Circuits and Systems, APCCAS, pp. 101-107, Dec. 2002.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
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59. M. Yavari, M.R. Hasanzadeh, J. Talebzadeh, and O. Shoaei, “A 3.3V 18 bit Digital Audio Sigma-Delta Modulator in 0.6-µm CMOS,” IEEE International Symposium on Circuits and Systems, vol. 2, pp. 640-643, Phoenix, Arizona, USA, May 2002. 60. J. Talebzadeh, M.R. Hasanzadeh, M. Yavari, and O. Shoaei, “A 10-bit 150-MS/s, Parallel Pipeline A/D Converter in 0.6µm CMOS,” IEEE International Symposium on Circuits and Systems, vol.3, pp. 133-136, Phoenix, Arizona, USA, May 2002. 61. J. Talebzadeh, M. Yavari, M.R. Hasanzadeh, and O. Shoaei, “A High-Speed and High- Resolution Parallel Pipeline A/D Converter in 0.6µm CMOS,” IEEE International Conference on Fundamentals of Electronics, Communications and Computer Sciences, ICFS, Tokyo, Japan, 2002. 62. M. Yavari, J. Talebzadeh, and O. Shoaei, “A High-Resolution & Low-Voltage Sigma-Delta Modulator in 0.6µm CMOS for Digital Audio,” Iranian Conference on Electrical Engineering, ICEE, Tabriz, Iran, May 2002. 63. M.R. Hasanzadeh, J. Talebzadeh, M. Yavari, and O. Shoaei, “A New-Method to Increase the Speed of Nyquist-Rate Current-Steering CMOS Digital-to-Analog Converters,” Iranian Conference on Electrical Engineering, ICEE, Tabriz, Iran, May 2002.
2001 64. M. Yavari and O. Shoaei, “A 3.3V High-Resolution Sigma-Delta Modulator for Digital Audio,” IEEE International Conference on Microelectronics, ICM, Rabat, Morocco, pp. 129-132, Oct. 2001. 65. M. Yavari and O. Shoaei, “A 3.3 V Second-Order Sigma-Delta Modulator for Digital Audio,” Iranian Conference on Electrical Engineering, ICEE, Tehran, Iran, May 2001. 66. M. Yavari, “The Design and Implementation of Adaptive Digital Filters using DLMS Algorithm,” in 4th Iranian Student Conference on Electrical Engineering (ISCEE), Sept. 2001. 67. M. Yavari and O. Shoaei, “The Design of Sigma-Delta Modulators for Digital Audio,” in 4th Iranian Student Conference on Electrical Engineering (ISCEE), Sept. 2001.
Prof. Mohammad Yavari
Amirkabir University of Technology
January 21, 2014
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